ROSS
armv7l.h
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1/*
2 This implementation of an ARM v7 clock reader utilizes the
3 Performance Monitoring Unit (PMU) on Cortex-A7 chips.
4 Unfortunately, access to the cycle counter from userspace
5 is disabled by default. A kernel module that enables access
6 from userspace is required or the system will fault.
7
8 An example kernel module that does just that can be found:
9 https://github.com/nmcglohon/armv7l-userspace-counter.git
10
11 More information can be found:
12 http://neocontra.blogspot.com/2013/05/user-mode-performance-counters-for.html
13 */
14
15#ifndef INC_clock_armv7l
16#define INC_clock_armv7l
17
18typedef unsigned int tw_clock;
19
20static inline tw_clock tw_clock_read(void)
21{
22 unsigned int result;
23#ifdef ROSS_timing
24 do {
25 __asm__ __volatile__ ("MRC p15, 0, %0, c9, c13, 0" : "=r"(result));
26 } while (__builtin_expect ((int) result == -1, 0));
27#endif
28
29 return result;
30}
31
32#endif
uint64_t tw_clock
Definition aarch64.h:6
static tw_clock tw_clock_read(void)
Definition armv7l.h:20